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RISC-V Vector Extension in a Nutshell (Part 3): mask & masked operations
I was wondering what would happen, if we use a masked widening operation. Let's say initially we have SEW = 8 Bit, and we use a widening operation. Then EEW = 16 Bit. Will we simply not update the bits corresponding to widened element or will we reshuffle the destination and reshuffle it like it is done in ARA 1.0:https://ieeexplore.ieee.org/document/9912071
The mask applies to (result) elements. So in that case each bit of the mask corresponds to a different widened result element is active (2 bytes in the case you describe).
I was wondering what would happen, if we use a masked widening operation. Let's say initially we have SEW = 8 Bit, and we use a widening operation. Then EEW = 16 Bit. Will we simply not update the bits corresponding to widened element or will we reshuffle the destination and reshuffle it like it is done in ARA 1.0:https://ieeexplore.ieee.org/document/9912071
ReplyDeleteThe mask applies to (result) elements. So in that case each bit of the mask corresponds to a different widened result element is active (2 bytes in the case you describe).
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